The present invention is related to forming contacts on semiconductors and is particularly related to methods for forming self-aligned contacts on compound semiconductors.
When metal contacts are formed on compound semiconductors, there is generally a need to provide a diffusion barrier between the contact metal and an active surface of the compound semiconductor. The diffusion barrier, which typically comprises materials such as platinum, tungsten, palladium and combinations or alloys thereof, is necessary to prevent contact and subsequent interaction between the contact metal and the semiconductor material. As is well known to those skilled in the art, interaction of the contact metal and the semiconductor material is highly undesirable. Such interaction may result in one or more elements of the compound semiconductor diffusing or intermixing with the contact metal, thereby altering the operational characteristics of the contact metal and semiconductor. Such interaction may degrade the crystalline structure of the semiconductor. Such interaction may also result in the formation of an alloy between the compound semiconductor and the contact metal, thereby changing the melting temperature of the semiconductor. In addition, the metal contacts formed on the semiconductor may not be as robust, and may be subject to more rapid and severe degradation under conditions of time and/or temperature than would otherwise occur with unmixed substances. Thus, barrier layers are typically provided to inhibit this reaction.
One prior art method for forming contacts on semiconductors is shown in FIGS. 1A-1N. Referring to FIG. 1A, a substrate 10 having a top surface 12 may comprise a dielectric or semiconductor material. A layer of a semiconductor material 14 is provided atop the first surface 12 of the substrate 10, as shown in FIG. 1B. Referring to FIG. 1C, a photoresist material 16 is then deposited atop the semiconductor layer. Referring to FIG. 1D, a photolithographic process may then be used to develop selected portions of the photoresist layer 16. In FIG. 1D, photoresist layer 16 has first sections 18A, 18B, 18C that are developed while second sections 20A, 20B remain undeveloped.
As shown in FIG. 1E, the developed portions of 18A, 18B, 18C of photoresist layer 16 are removed, leaving behind the undeveloped portions 20A, 20B. The undeveloped portions 20A, 20B of photoresist layer overlie first sections 14A, 14B of the semiconductor layer 14, while second sections 14C, 14D, 14E of the semiconductor layer remain exposed. Referring to FIG. 1F, the second sections 14C, 14D, 14E of the semiconductor layer are then removed, leaving behind semiconductor mesas 22A, 22B atop the first surface 12 of substrate 10. As shown in FIG. 1G, the photoresist material is then stripped away to leave semiconductors exposed atop substrate 10. Referring to FIG. 1H, a second photoresist layer 24 is then provided atop the semiconductor mesas 22A, 22B and the top surface 12 of substrate 10. Referring to FIG. 11, the second photoresist layer 24 is then subjected to a photolithographic process to form openings 26 therein. The openings generally conform to a desired pattern for contacts or conductive traces.
Referring to FIG. 1J, a metal 28 is then deposited atop the structure. The metal 28 covers a top surface 30 of the second photoresist layer 24 and the portions of the semiconductor mesa 22A, 22B and substrate 10 exposed through the photoresist openings.
FIG. 1J-1 shows a magnified view of the metal 28 deposited atop one of the semiconductor mesas 22 shown in FIG. 1J. Typically, when a contact 28 is formed atop a semiconductor device, the contact comprises a multi-layer structure. Each layer preferably comprises a conductive metal. In the structure shown in FIG. 1J-1, the contact 28 is formed by first depositing an adhesion metal 32 selected to form a bond with the semiconductor device. Next, a barrier metal 34 is deposited atop the adhesion metal. A contact metal, such as gold, silver, aluminum or copper, is then deposited atop the barrier metal. The barrier metal is designed to provide a diffusion barrier between the active surface of the semiconductor device and the contact metal deposited atop the barrier metal.
The various metal layers are provided by depositing metal particles atop the semiconductor. This is typically accomplished in a deposition tool such as by metal evaporation or by metal sputtering, wherein metal is deposited onto a semiconductor to build up a layer of a particular metal. The metal layers can have different thicknesses depending upon the required function of the device. For example, the contact metal layer 36 is typically thicker than the barrier metal layer. In addition, the thickness of each layer can be controlled by regulating the specific manufacturing techniques used when depositing the layers. As is generally known to those skilled in the art, the edges of later deposited, thicker metal layers tend to overlap the edges of earlier deposited, thinner metal layers. This is because the later deposited, thicker metal layer tends to spread over the edge of the earlier deposited, thinner layer. The overlapping edge of the later deposited layer is commonly referred to as a tail. As used herein, the term xe2x80x9ctailxe2x80x9d means the edge of the thicker metal layer that overlaps the edge of the thinner metal layer. As shown in FIG. 1J-1, the overlapping edge 38 of contact metal layer 36 extends beyond the edge 40 of barrier metal layer 34 to form tail 38. As a result, the contact metal layer 36 is able to contact the active surface of semiconductor 22, resulting in the contact metal-semiconductor interaction problems described above.
FIG. 1J-2 shows a magnified view of the edge of contact 28 formed atop semiconductor device 22. As shown, the tail 38 of contact metal layer 36 is in direct contact with the active surface of semiconductor 22. As a result, the contact metal 36 may interact with semiconductor 22, causing the adverse problems described above.
One adverse consequence of contact metal-semiconductor interaction is shown in FIG. 1K. When the elements comprising the compound semiconductor diffuse into the contact metal, an alloy 25 may form between the semiconductor 22 and the contact metal 36. The formation of the alloy 25 is undesirable as it may adversely affect the mobility, the speed of switching, and/or the performance of the semiconductor. In certain embodiments, performance may suffer because the quality of the crystalline structure of the semiconductor is adversely affected. Diffusion may also alter the resistance of the semiconductor or the contact metal 36, thereby changing the operating characteristics of the structure.
Referring to FIGS. 1L and 1M, after the contacts 28 have been formed atop the semiconductors 22, a passivation layer 42 is provided atop the first surface 12 of the substrate 10, and over the semiconductor mesas 22 and the contacts 28 deposited thereon. Referring to FIG. 1N, the passivation layer 42 is then selectively removed to form contact openings 44 that extend to the contact metal 28.
Thus, there is a need for a method for forming robust contacts for compound semiconductors wherein the contact metal does not interact with the semiconductor. This may be accomplished by providing a barrier layer that effectively isolates the contact metal from the semiconductor.
In certain preferred embodiments of the present invention, a method of forming a self-aligned contact on a semiconductor includes forming a layer of a dielectric material, commonly referred to as a passivation layer, atop a semiconductor. The dielectric material layer preferably comprises an impervious, non-conductive material. Preferred dielectric materials for the passivation layer include glass, ceramic, silicon oxide, silicon nitride and aluminum oxide. A layer of a photoresist may then be provided over the layer of dielectric material. A photolithographic process may then be used to expose a desired pattern in the photoresist layer and to develop openings in the photoresist layer. The openings developed in the photoresist layer preferably correspond to the desired pattern exposed in the photoresist layer. In certain preferred embodiments, the photolithographic process is carried out so that the openings formed in the photoresist layer define an undercut profile.
After the opening has been developed in the photoresist layer, the dielectric material exposed through the photoresist layer opening is preferably removed so as to form a contact opening extending through the dielectric material layer to the semiconductor. The selected portions of the dielectric material layer may be removed by etching away the dielectric material. Preferred etching techniques may include wet chemical etching or dry etching. As described above, the etchant will remove dielectric material so as to expose a top surface of the semiconductor. The pattern etched in the dielectric material layer preferably conforms to the pattern of the opening in the photoresist layer.
After the contact openings have been formed through the dielectric material layer, the photoresist layer is further eroded, whereby the overall volume and/or area of the photoresist layer is reduced. As a result, the size of the opening in the photoresist layer is enlarged. Thus, the dielectric material adjacent the contact opening is exposed through the enlarged opening of the photoresist layer. A barrier metal such as platinum, tungsten, palladium and/or combinations or alloys thereof, may then be deposited atop the photoresist layer and in the enlarged opening of the photoresist layer. As a result, the barrier metal will be deposited in the contact opening of the dielectric material and atop the dielectric material exposed through the enlarged opening of the photoresist layer. At least a portion of the barrier metal will overlie the exposed edges of the dielectric material layer. After the barrier metal is deposited, a contact metal may then be deposited atop the barrier metal. Preferred contact metals include gold, silver, aluminum and copper and combinations or alloys thereof. The barrier metal layer overlaps an edge of the dielectric material layer so as to isolate the contact metal from the semiconductor. As a result, the barrier metal will prevent the contact metal from interacting with the semiconductor, thereby avoiding the problems discussed above.
Although the present invention is not limited by any particular theory of operation, it is believed that isolating the contact metal layer from the active surface of a semiconductor will result in a more reliable semiconductor device. The present invention ensures that any contact metal deposited atop the semiconductor device will be isolated from the semiconductor by the barrier metal. The isolation of the contact metal from the semiconductor generally results from the step of further eroding the photoresist layer after initially removing portions of the dielectric material layer. As the photoresist layer is further eroded, the size of the openings through the photoresist layer will increase in area. As a result, additional portions of the dielectric material layer will be exposed through the enlarged openings of the eroded photoresist layer. These additional portions of dielectric material will then be covered by a barrier metal during the barrier metal deposition step. If the photoresist layer were not further eroded to increase the size of the openings, very little barrier metal would actually be deposited atop the dielectric material. The eroding the photoresist layer step exposes more of the dielectric material through the photoresist layer opening so as to dramatically increase the amount of barrier metal deposited atop the dielectric material layer.
In certain preferred embodiments, the contact is a multi-layer structure that preferably includes an adhesion metal, a barrier metal and a contact metal. The multi-layer contact may be formed by first depositing the adhesion metal atop the contact opening, followed by the barrier metal. Next, the contact metal is deposited atop the barrier metal and a second adhesion metal layer is deposited atop the contact metal. The contact metal layer may form the thickest layer of the multi-layer structure. After the contacts have been formed atop the semiconductor, the method may also include the step of lifting off the photoresist layer and any metal deposited atop the photoresist layer.
In further preferred embodiments of the present invention, a method of forming a self-aligned contact on a semiconductor includes forming a layer of a dielectric material over a semiconductor, providing a photoresist layer over the dielectric layer and exposing the photoresist layer with a desired pattern. One or more openings are then developed in the photoresist layer, the openings corresponding to the desired pattern exposed in the photoresist layer. The dielectric material exposed through the one or more openings of the photoresist layer is then removed so as to form one or more contact openings that extend through the dielectric material to the semiconductor. The photoresist layer is then eroded so as to reduce the volume and/or area of the photoresist layer. A barrier metal is then deposited in the one or more openings of the photoresist layer so as to cover the one or more contact openings of the dielectric material. At least a portion of the barrier metal layer preferably overlies the dielectric material exposed through the enlarged openings of the photoresist layer. A contact metal may then be deposited atop the barrier metal. Because the photoresist layer is eroded, the deposited barrier metal overlaps at least a portion of the dielectric material layer. In turn, the barrier metal isolates the contact metal from the semiconductor.
In accordance with still further preferred embodiments of the present invention, a method of forming self-aligned contacts on a semiconductor includes providing a substrate having a first surface and forming a plurality of semiconductors, such as semiconductor mesas, atop the first surface of the substrate. A dielectric passivation layer is then formed over the substrate and the semiconductors and a photoresist layer is provided over the dielectric passivation layer. The photoresist layer is then exposed to a desired pattern and the photoresist layer is developed to form an opening therein. The opening in the photoresist layer substantially conforms to the desired pattern to which the photoresist layer had been exposed. The dielectric material exposed through the photoresist layer opening is then removed, such as by using an etching process, so as to form contact openings. Each of the contact openings preferably extends through the dielectric material to a top surface of one of the semiconductor mesas. The photoresist layer is then preferably eroded so as to enlarge the size of the openings in the photoresist layer. As a result, the dielectric material adjacent the contact openings is exposed through the enlarged openings of the photoresist layer. A barrier metal may then be deposited through the enlarged openings of the photoresist layer, atop the dielectric material exposed through the enlarged openings and in the contact openings of the dielectric material layer. As a result, the deposited barrier metal will overlie the portions of the dielectric material layer exposed through the enlarged openings. A contact metal may then be deposited atop the barrier metal so that the barrier metal isolates the contact metal from the active surface of the semiconductors so as to prevent the contact metal from diffusing into the semiconductors.
These and other preferred embodiments of the present invention will be described in more detail below.